I am missing some detailed information about the hardware (!) timers. Sometimes the software timers or the sdk interface are just not enough. Coming from ATMega devices, where the timers are very thorougly documented and easy to use.
This is the information that I gathered, please correct.
Two timers, FRC1 and FRC2 (once called "frame rate counter", but something "fast real-time clock timer" looks more significant?).
FRC1 counts down, 22 bits resolution, frequency is 80 Mhz divided by 1, 16 or 256, even though this line:
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#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256
says it's always divided by 256???
FRC2 counts up, 32 bits resolution, frequency is ???
I have found some #defines that tell where to load and read the timer current value. I assume there are no "compare values" like on the ATmega, it simply counts down to zero and then, if configured, fires and interrupt?
When I am using os_timer_* functions (not hw_timer, as documented), I find that any interrupt handler attached to FRC1 is not called. This is not documented. Is that correct? When I change the interrupt source for FRC1_NMI, it is called indeed. Can this be explained?
Is there a way to have an interrupt connected to FRC2? What does the SDK code use FRC2 for itself, will it interfere with SDK code when I use it myself?
Also I found that as soon as the FRC1_NMI is used, the pin change interrupts stop working. This is also not documented. Please explain.