Meaning of ICACHE_FLASH_ATTR

eriksl
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Re: Meaning of ICACHE_FLASH_ATTR

Postby eriksl » Sat Oct 03, 2015 3:00 pm

I don't know. I did place complete libraries (from the SDK and libc, one by one) in IROM and at certain points it just crashed. So I am not going there anymore. I must say that Espressif has been doing good work lately with moving more functions in their SDK to IROM. Now the biggest user of IRAM is libc.

mariuszb
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Joined: Tue Jun 16, 2015 2:51 pm

Re: Meaning of ICACHE_FLASH_ATTR

Postby mariuszb » Thu Dec 10, 2015 9:49 pm

Hi,

1. With ICACHE_FLASH_ATTR progam is located in FLASH, and if necessary read directly from FLASH, or before use sent to a cache? and than used ?
2. Without ICACHE_FLASH_ATTR program is loaded into IRAM at start, and if there is no place for all ?
The rest is located in Flash is run directly from FLASH or with cache ?

Best Regards
Mariusz

eriksl
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Re: Meaning of ICACHE_FLASH_ATTR

Postby eriksl » Fri Dec 11, 2015 3:22 am

code with ICACHE_FLASH_ATTR will end up in irom (flash) only.
code without ICACHE_FLASH_ATTR will end up in irom (flash) and will be copied to iram (ram) on bootup.

The iram space is quite limited, including space needed by SDK and other libraries you will only have a few kbytes for your own application. So add the phrase to every function you declare.

philip
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Re: Meaning of ICACHE_FLASH_ATTR

Postby philip » Tue Feb 09, 2016 11:28 am

Does the ESP8266 CPU have an instruction cache on it, or are instructions directly fetched from the external flash memory whenever they are executed?

If there is a cache, how big is it?

I'm trying to figure out how the performance of the internal instruction ram and external flash differ -- so I can allocate code correctly.

Thanks

eriksl
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Joined: Fri May 22, 2015 6:22 pm

Re: Meaning of ICACHE_FLASH_ATTR

Postby eriksl » Tue Feb 09, 2016 4:33 pm

Very good questions, this has been all mysterious.

But I can answer your last question: simply put ALL your code in flash (apart maybe from a few a very small functions that handle interrupts). The libs from the SDK already take up most of the IRAM so you will run out of it very quickly.

electronicsguy
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Re: Meaning of ICACHE_FLASH_ATTR

Postby electronicsguy » Mon Apr 25, 2016 3:31 am

eriksl wrote:Very good questions, this has been all mysterious.

But I can answer your last question: simply put ALL your code in flash (apart maybe from a few a very small functions that handle interrupts). The libs from the SDK already take up most of the IRAM so you will run out of it very quickly.


If we program using Arduino IDE, do we have control over where we can put our code, if we want?

NiclasH
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Joined: Thu May 26, 2016 6:06 pm

Re: Meaning of ICACHE_FLASH_ATTR

Postby NiclasH » Thu May 26, 2016 6:22 pm

Very interesting thread. I got here because I wanted to find out what does this ICACHE_FLASH_ATTR means, and to my surprise the c_types.h showed;

Code: Select all

#define ICACHE_FLASH_ATTR


i.e. nothing!!!!

And that definition doesn't match dkinzer's (probably) pasted code from c_types.h back at that time.

SO, I ran a test, just to make sure. And yes, this macro has no meaning in my SDK (ESP8266_RTOS_SDK_V1.4.0/), exactly the same binaries are produced no matter if I add or remove it.

The definition now is;

Code: Select all

#define __packed            __attribute__((packed))
#define STORE_ATTR          __attribute__((aligned(4)))

#define SHMEM_ATTR
#define ICACHE_FLASH_ATTR

#define DMEM_ATTR           __attribute__((section(".bss")))
#define IRAM_ATTR           __attribute__((section(".text")))
#define ICACHE_RODATA_ATTR  __attribute__((section(".irom.text")))


So, I guess that for stuff that I really need in IRAM (interrupt routines and Flash FS), should be marked with the IRAM_ATTR macro, and data that is totally constant could be marked with ICACHE_RODATA_ATTR.

Is there anyone that can confirm this?

Cheers
Niclas

mkeyno
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Joined: Sat Jul 09, 2016 4:41 pm

Re: Meaning of ICACHE_FLASH_ATTR

Postby mkeyno » Sat Jul 09, 2016 5:03 pm

what is the benefits to put the function in different type of memory , if is due to speed how much each section has different

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pratik
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Re: Meaning of ICACHE_FLASH_ATTR

Postby pratik » Sat Jul 09, 2016 10:09 pm

NiclasH wrote:Very interesting thread. I got here because I wanted to find out what does this ICACHE_FLASH_ATTR means, and to my surprise the c_types.h showed;

Code: Select all

#define ICACHE_FLASH_ATTR


i.e. nothing!!!!

And that definition doesn't match dkinzer's (probably) pasted code from c_types.h back at that time.

SO, I ran a test, just to make sure. And yes, this macro has no meaning in my SDK (ESP8266_RTOS_SDK_V1.4.0/), exactly the same binaries are produced no matter if I add or remove it.

The definition now is;

Code: Select all

#define __packed            __attribute__((packed))
#define STORE_ATTR          __attribute__((aligned(4)))

#define SHMEM_ATTR
#define ICACHE_FLASH_ATTR

#define DMEM_ATTR           __attribute__((section(".bss")))
#define IRAM_ATTR           __attribute__((section(".text")))
#define ICACHE_RODATA_ATTR  __attribute__((section(".irom.text")))


So, I guess that for stuff that I really need in IRAM (interrupt routines and Flash FS), should be marked with the IRAM_ATTR macro, and data that is totally constant could be marked with ICACHE_RODATA_ATTR.

Is there anyone that can confirm this?

Cheers
Niclas


Hello Niclas,
As mentioned in the SDK getting started guide, all functions are stored in CACHE area by default since ESP8266_RTOS_SDK_v1.2.0.
You need not add the attribute anymore to every function.
And you are correct about IRAM and RODATA part.
Regards,
Pratik Panda
Website: http://www.PratikPanda.com

Custom firmware, Knowledge base and freelancing (ESP8266/ESP32):
http://www.iot-bits.com

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pratik
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Re: Meaning of ICACHE_FLASH_ATTR

Postby pratik » Sat Jul 09, 2016 10:16 pm

mkeyno wrote:what is the benefits to put the function in different type of memory , if is due to speed how much each section has different


Hello,

The speed difference might not be much if you are running your code off 80MHz QIO flash. Typically, assuming ideal conditions, you may have a 15-20% code execution speed increase by using IRAM instead of CACHE.
However, if you share the primary flash SPI interface to drive IO expanders or communication chips, you should run code from IRAM when the code cannot fit in the cache. That can make a big difference at times.

Do note that the LOADING SPEED and EXECUTION SPEED are two completely different things. Running a huge inline routine with no loops from IRAM will not be much faster than CACHE mode.
However, for applications like ciphers or other complex looping code, IRAM will prove way better than the CACHE. The loading time is the same - only execution times make the big difference.
Hope that helps! :)
Regards,
Pratik Panda
Website: http://www.PratikPanda.com

Custom firmware, Knowledge base and freelancing (ESP8266/ESP32):
http://www.iot-bits.com

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