ESP8266 Developer Zone The Official ESP8266 Forum 2014-11-09T20:46:33+08:00 https://bbs.espressif.com:443/feed.php?f=15&t=19 2014-11-09T03:47:04+08:00 2014-11-09T03:47:04+08:00 https://bbs.espressif.com:443/viewtopic.php?t=19&p=116#p116 <![CDATA[Re: Proposal: DIY shielded low-cost opensource module]]> Attached Gerber. Drill format: 2/3 or 3/3
esp127_2.png

gerber127_2.zip

Statistics: Posted by Lars R. — Sun Nov 09, 2014 3:47 am


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2014-11-02T21:14:53+08:00 2014-11-02T21:14:53+08:00 https://bbs.espressif.com:443/viewtopic.php?t=19&p=51#p51 <![CDATA[Re: Proposal: DIY shielded low-cost opensource module]]>
Breaking out the SPI signals enables the following copy protection application:
ESP8266 <-> small microcontroller with secret key <-> SPI-Flash encrypted with secret key.

The key on the microcontroller is not recoverable and the microcontroller will provide SPI data only in fractions and maybe after an authorization. This complicates the reconstruction of the SPI-flash content significantly. One might use signed boot loaders, encryption between ESP8266 and the microcontroller, and so on.
If the SPI-Flash is directly connected to the ESP8266, one can simply readout the SPI-Flash.
esp127.png

Statistics: Posted by Lars R. — Sun Nov 02, 2014 9:14 pm


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2014-11-02T08:57:07+08:00 2014-11-02T08:57:07+08:00 https://bbs.espressif.com:443/viewtopic.php?t=19&p=46#p46 <![CDATA[Re: Proposal: DIY shielded low-cost opensource module]]>
pcb1_layer1_allpins.png

Statistics: Posted by Lars R. — Sun Nov 02, 2014 8:57 am


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2014-11-09T20:46:33+08:00 2014-10-31T22:00:52+08:00 https://bbs.espressif.com:443/viewtopic.php?t=19&p=39#p39 <![CDATA[Proposal: DIY shielded low-cost opensource module]]> Motivation
  • Good signal integrity (lots of decouple caps), good OSC (the one you choose)
  • Shielded!
  • inlcude your favorite DCDC, flexibility (no additional space for that)
  • Solder @Home (Reflow or by hand, footprints as big as possible)
  • Breadboard compatible, 2.54mm Pinheader
  • Antenne pad with option for RP-SMA
  • Availability of many GPIOs
  • Opensource
Specification
  • 2 PCBs with 2 Layers each. ESP8266 in between
  • 1. PCB: with ESP8266
  • 2. PCB: above ESP8266, acting as shield and for placement of DCDC
  • Alltogether 4 Layers
  • Allignment of PCBs via Pinheader (holes in both PCBs)
  • DCDC of your choice on 2. PCB. Maybe also small uC, USB
  • Using multiple VCC3V3-Pins of pinheader on 1. PCB (see image)
Layout description
  • Side view: see attachment
  • 1. PCB Layer 1: Signals, ESP8266, C, R (see attachment)
  • 1. PCB Layer 2: Ground
  • 2. PCB Layer 1: DCDC, custom components
  • 2. PCB Layer 2: Combine 3V3, Ground
  • Customizing the 2. PCB is easy
Cost of materials
  • Make 4 PCBs on 5x5cm (your favorite PCB manufacture)
  • I estimated 8USD (including RP-SMA, DCDC, both PCBs, 10ppm-OSC, a.s.o.). One can do better.
Ideas for placing
  • under ESP8266: no solder mask, no cooper
  • Surround ESP8266 with solder mask, traces to the edge of the package
  • Via under ESP8266. Make the via rest-ring plane; solder this subsequently
  • Placing USON Flash: Todo; Alternative: bigger package on 2. PCB
Considerations for solder
  • Use low-temperature solder. Do not overheat 0.6mm-PCB.
50Ohm considerations
  • Thickness of 1. PCB: 0.6mm. -> 50Ohm trace: approx. 1mm
  • Witdh of RP-SMA pad: approx. 1mm
  • Width of 0603 footprint: approx 1mm
Where is the Opensouce layout?
There is quite some work in making this concept and in doining such a placing. If you would like to continue from here on, you are very welcome. Otherwise, I will make and provide the layout in approx. 3 month. Bussy at the moment.

Note: Design is based on documentation that is or was freely available.
Edit: Changed note.
sideview.png

pcb1_layer1.png

Statistics: Posted by Lars R. — Fri Oct 31, 2014 10:00 pm


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