ESP8266 Developer Zone

Re: avoid clock-out on gpio0 at reset?

2016-01-12T13:33:40+08:00

You said GPIO0 will be connected to the programmer via a cable. Please let us know how you control the level of GPIO0 and how the 26Mhz clock cause noise issues.

Please try the following experiment: take two esp8266 modules and try to program one of them using the other. Let's call "esp-A" the module to be programmed by the second module we'll call "esp-B". I.e., esp-B will put esp-A into flash mode and receive the firmware binary via Wifi and push it to esp-A to program it.

On a breadboard:
- connect power to modules esp-A and esp-B
- connect uart0 rx/tx of both modules (cross-over tx to rx)
- connect gpio12 of esp-B to gpio0 of esp-A, and gpio13 of esp-B to reset of esp-A so you can put esp-A into flash mode programmatically
- load some (arbitrary) firmware onto esp-B, connect to your local wifi access point, look at the RSSI and perform some throughput or packet loss tests
- now place esp-A into programming mode (i.e. manually set gpio-15 low, gpio-2&gpio-0 high, apply reset pulse, then let gpio pins float or weak pull-up)
- verify that esp-A outputs a 26Mhz signal on gpio-0
- now pretend that you are sending esp-B the binary to program esp-A (you don't actually have to really do it and can use any firmware of your choice that allows you to test the Wifi): repeat your RSSI, throughput or packet loss tests. Unless your results are very different from mine, you will have difficulty communicating with esp-B. If your access point is very close, then it may work, but you should be able to see the effects of the interference.

I have found it very difficult to overcome this interference. I have tried placing an RC filter of 100 ohm & 33pf as close to the gpio0 pin as possible (this is using SMT components on a PCB, not a breadboard) and that helps a lot, but still leaves a lot of interference. I have not tried to add a few ferrite beads on the programming cable yet, but that will be my next attempt. Overall, it would be really good if there was some way to reset the esp8266 into programming mode that does not produce a 26Mhz output! I hope the esp32 will not do this...

Statistics: Posted by tvoneicken — Tue Jan 12, 2016 1:33 pm

Re: avoid clock-out on gpio0 at reset?

2015-12-14T10:54:50+08:00

Dear Tve,

GPIO0 outputs the clock frequency of the external cystal(e.g. 26MHz) by default, which cannot be modified.
Even you can modify the functions of GPIO0 in the codes, however, before programm starts to run, GPIO0 still outputs the clock frequency of the external cystal.

You said GPIO0 will be connected to the programmer via a cable. Please let us know how you control the level of GPIO0 and how the 26Mhz clock cause noise issues.

RESET is level trigged and the hold time of low voltage needs to be at least 100us.

Any more questions, please let us know.

Thanks.

Statistics: Posted by Espressif_Kelly — Mon Dec 14, 2015 10:54 am

avoid clock-out on gpio0 at reset?

2015-12-05T13:19:31+08:00

I am finding that in prototyping situations the fact that gpio0 outputs the 26Mhz clock can cause quite some noise issues. Cables, etc. Since gpio0 has to be pulled high or low in order to control the boot mode, it has to be connected to the programmer, often via a cable. Is there a way to toggle reset to prevent getting the clock output?

Also: what is the minimum duration of a reset pulse? I noticed that a 200us pulse is not reliable, for example. The datasheet does not say anything that I could find.

Statistics: Posted by tve — Sat Dec 05, 2015 1:19 pm