ESP8266 Developer Zone The Official ESP8266 Forum 2016-11-10T12:53:41+08:00 https://bbs.espressif.com:443/feed.php?f=65&t=2984 2016-11-10T12:53:41+08:00 2016-11-10T12:53:41+08:00 https://bbs.espressif.com:443/viewtopic.php?t=2984&p=10492#p10492 <![CDATA[Re: I2S bits per sample]]> Which register map file are you referring to when programming the I2S registers? Can you please attach that?

Statistics: Posted by Guest — Thu Nov 10, 2016 12:53 pm


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2016-10-31T17:23:31+08:00 2016-10-31T17:23:31+08:00 https://bbs.espressif.com:443/viewtopic.php?t=2984&p=10364#p10364 <![CDATA[I2S bits per sample]]>
In the I2SCONF register bits 12-15 signify the number of extra bits shifted out after each 16 bits. Using 4 bits however, I cannot set this to 16, which would be required for 24-bit audio data within a 32-bit sample. The Rx FIFO mode in bits 16-18 of the I2S_FIFO_CONF register is set to 2 (= 24 bits per channel full data discontinue). Looking at the data being received from the ADC, it seems that the most significant bit is lost when I set I2S_BITS_MOD to 15.
How do I setup the I2S registers to receive 24-bit audio data in a 32-bit word?

Han

Statistics: Posted by Han — Mon Oct 31, 2016 5:23 pm


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