ESP8266 Developer Zone

Re: ESP8266 UART overrun in RTS/CTS

2015-12-11T10:18:16+08:00

Hi,

We have tested it, here is the test result :
The flow control is set to be 110 bytes,
if there are more than 110 (>110) bytes in RX FIFO, RTS is in high-level.
if there are less than 110 (<=110) bytes in RX FIFO, RTS is in low-level.

Thanks for your interest in ESP8266 !

Statistics: Posted by ESP_Faye — Fri Dec 11, 2015 10:18 am

Re: ESP8266 UART overrun in RTS/CTS

2015-12-10T11:01:32+08:00

sorry, my fault. ESP8266 work fine, one is hardware fault(STM32F013). another is Software fault(STM32F405).
But i still need answer for second question. Could somebody tell me? Thanks!

Statistics: Posted by wjzhang — Thu Dec 10, 2015 11:01 am

Re: ESP8266 UART overrun in RTS/CTS

2015-12-08T15:07:56+08:00

sorry for missing test environment:
ESP8266 SDK: NoOS SDK 1.5.0.
Client: using RTS/CTS handshake, block only the ESP8266 RTS is high.

the RX full threshold is 3/4 FIFO= 96bytes=0x60.
//set rx 3/4 FIFO trigger, 2 byte time out
WRITE_PERI_REG(UART_CONF1(uart_no),
((0x60 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
(0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | UART_RX_TOUT_EN );

Statistics: Posted by wjzhang — Tue Dec 08, 2015 3:07 pm

ESP8266 UART overrun in RTS/CTS

2015-12-08T12:28:10+08:00

Hi, i found my uart get Overrun error when the RTS/CTS enable, it cause lost data on uart. i set RTS rise when FIFO reach to 120(0x78).
if((pconfig->hwflowctrl == USART_HardwareFlowControl_CTS_RTS) || (pconfig->hwflowctrl == USART_HardwareFlowControl_RTS))
{
SET_PERI_REG_MASK(UART_CONF1(uart_no), ((0x78 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | UART_RX_FLOW_EN );
}

question:
1) why the overrun happened when RTS enable?
2) when the RTS fall? the Rx FIFO data all read? or Rx FIFO data less than threshold?

the client follow the RTS/CTS.

Statistics: Posted by wjzhang — Tue Dec 08, 2015 12:28 pm