Code:
#define SPI_FLASH_PageSize 256
#define WRITE 0x02 /* Write to Memory instruction */
#define WRSR 0x01 /* Write Status Register instruction */
#define WREN 0x06 /* Write enable instruction */
#define READ 0x03 /*Read from Memory instruction */
#define FSTREAD 0x0B /* FAST Read from Memory instruction */
#define RDSR 0x05 /* Read Status Register instruction */
#define RDID 0x90 /* Read ¹¤³§ID */
#define SE 0x20 /* Sector Erase instruction */
#define BE 0xD8 /* Bulk Erase instruction */
#define CE 0xC7 /* ȫƬ²Á³ý*/
#define WIP_Flag 0x01 /* Write In Progress (WIP) flag */
#define Dummy_Byte 0x00 /* Dummy Byte The data on the line not care*/Statistics: Posted by xiaoleizii — Thu Aug 18, 2016 11:40 am
Statistics: Posted by xiaoleizii — Thu Aug 18, 2016 11:33 am
Code:
void hspi_hardware_init(void) {
/*
SpiAttr HspiInitAttr;
HspiInitAttr.mode = SpiMode_Master;
HspiInitAttr.bitOrder = SpiBitOrder_MSBFirst;
HspiInitAttr.subMode = SpiSubMode_2;
HspiInitAttr.speed = SpiSpeed_2MHz;
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005);
// WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, FUNC_HSPIQ_MISO); //configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_HSPID_MOSI); //configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, FUNC_HSPI_CLK); //configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_HSPI_CS0); //configure io to spi mode
CLEAR_PERI_REG_MASK(SPI_PIN(SpiNum_HSPI), SPI_CS0_DIS);
SET_PERI_REG_MASK(SPI_PIN(SpiNum_HSPI), SPI_CS1_DIS |SPI_CS2_DIS);
SPIInit(SpiNum_HSPI, &HspiInitAttr);
SPICsPinSelect(SpiNum_HSPI, SpiPinCS_0);
// SET_PERI_REG_MASK(SPI_USER(SpiNum_HSPI), SPI_CS_SETUP|SPI_CS_HOLD|SPI_USR_COMMAND|SPI_USR_MOSI);
// CLEAR_PERI_REG_MASK(SPI_USER(SpiNum_HSPI), SPI_FLASH_MODE);
// CLEAR_PERI_REG_MASK(SPI_CTRL(SpiNum_HSPI), SPI_QIO_MODE|SPI_DIO_MODE|SPI_DOUT_MODE|SPI_QOUT_MODE);
// WRITE_PERI_REG(SPI_CLOCK(SpiNum_HSPI),
// ((3&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)|
// ((1&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
// ((3&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S));
// WRITE_PERI_REG(SPI_USER1(SpiNum_HSPI),
// ((7&SPI_USR_MOSI_BITLEN)<<SPI_USR_MOSI_BITLEN_S)|
// ((7&SPI_USR_MISO_BITLEN)<<SPI_USR_MISO_BITLEN_S));*/
// hspi_overlap_init();
hspi_master_dev_init(HSPI_CS_DEV, 1, 0x1F);
hspi_dev_sel(HSPI_CS_DEV);
// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_GPIO15);
// GPIO_OUTPUT_SET(GPIO_ID_PIN(15), 1);
// hspi_overlap_flash_init();
}Code:
int hspi_write_data(uint32_t addr, uint32_t* data, uint32_t length) {
SpiData tspidata;
int status;
tspidata.addr = &addr;
tspidata.addrLen = 3;
tspidata.cmd = WRITE;
tspidata.cmdLen = 1;
tspidata.data = data;
tspidata.dataLen = length;
status = SPIMasterSendData(SpiNum_HSPI, &tspidata);
return status;
}
int hspi_read_data(uint32_t addr, uint32_t* data, uint32_t length) {
SpiData tspidata;
int status;
tspidata.addr = &addr;
tspidata.addrLen = 3;
tspidata.cmd = FSTREAD;
tspidata.cmdLen = 1;
tspidata.data = data;
tspidata.dataLen = length;
status = SPIMasterRecvData(SpiNum_HSPI, &tspidata);
return status;
}
int hspi_erase_sector(uint32_t addr) {
SpiData tspidata;
int status;
tspidata.addr = &addr;
tspidata.addrLen = 3;
tspidata.cmd = SE;
tspidata.cmdLen = 1;
tspidata.dataLen = 0;
// GPIO_OUTPUT_SET(GPIO_ID_PIN(15), 0);
status = SPIMasterSendData(SpiNum_HSPI, &tspidata);
hspi_wait_for_write_finish();
// GPIO_OUTPUT_SET(GPIO_ID_PIN(15), 1);
return status;
}
int hspi_write_enable(void) {
SpiData tspidata;
int status;
tspidata.addrLen = 0;
tspidata.cmd = WREN;
tspidata.cmdLen = 1;
tspidata.dataLen = 0;
status = SPIMasterSendData(SpiNum_HSPI, &tspidata);
return status;
}
uint8_t hspi_read_status(void) {
// SpiData tspidata;
uint32_t flash_staus;
//
// tspidata.addrLen = 0;
// tspidata.cmd = RDSR;
// tspidata.cmdLen = 1;
// tspidata.data = &flash_staus;
// tspidata.dataLen = 1;
flash_staus = SPIMasterRecvStatus(SpiNum_HSPI);
// SPIMasterRecvData(SpiNum_HSPI, &tspidata);
return flash_staus & 0xFF;
// return 0x00;
}
int hspi_wait_for_write_finish(void) {
uint32_t flash_status = 0;
do {
flash_status = hspi_read_status();
printf("FLASH STATUS ----------> 0x%X \r\n", flash_status);
vTaskDelay(100 / portTICK_RATE_MS);
} while (flash_status & 0x01 > 0);
return flash_status;
}
Code:
int hspi_flash_test(uint32_t addr) {
uint8_t tbuf[64], status = 0;
uint8_t tbufchk[64] = { 0 };
uint16_t i;
spi_flash_read(0x1000, (uint32_t *)tbufchk, 64);
disp_arry(tbufchk, 64);
os_printf("spi_clk HSPI %08x\r\n", READ_PERI_REG(PERIPHS_IO_MUX));
for (i = 0; i < 64; i++)
tbuf[i] = i;
printf("FLASH ERASE SECTOR!!\r\n");
hspi_erase_sector(addr);
vTaskDelay(5000 / portTICK_RATE_MS);
flash_write_data(tbuf, addr, 64);
printf("FLASH WRITE SECTOR!!\r\n");
disp_arry(tbuf, 64);
vTaskDelay(5000 / portTICK_RATE_MS);
flash_read_data(tbufchk, addr, 64);
printf("FLASH READ SECTOR!!\r\n");
disp_arry(tbufchk, 64);
vTaskDelay(5000 / portTICK_RATE_MS);
printf("FLASH CMP DATA!!\r\n");
status = Buffercmp(tbufchk, tbuf, 64);
if (status == 0)
printf("FLASH TEST SUCCESS!!\r\n");
else
printf("FLASH TEST FAIL!!\r\n");
return status;
}Statistics: Posted by xiaoleizii — Thu Aug 18, 2016 11:17 am