Code:
Main.o: file format elf32-xtensa-le
Disassembly of section .irom0.text:
00004000 <init_ThermostatSettings+0xa0>:
4000: 000021 l32r a2, fffc4000 <user_init+0xfffb8e20>
4003: 000001 l32r a0, fffc4004 <user_init+0xfffb8e24>
4006: 0000c0 callx0 a0
4009: 000846 j 402e <init_ThermostatSettings+0xce>
400c: 280000 excw
400f: 0f .byte 0xf
4010: 0c1266 bnei a2, 1, 4020 <init_ThermostatSettings+0xc
0>
4013: 000021 l32r a2, fffc4014 <user_init+0xfffb8e34>
4016: 000001 l32r a0, fffc4018 <user_init+0xfffb8e38>
4019: 0000c0 callx0 a0
401c: 000386 j 402e <init_ThermostatSettings+0xce>
401f: 0f2800 excw
4022: 082266 bnei a2, 2, 402e <init_ThermostatSettings+0xc
e>
4025: 000021 l32r a2, fffc4028 <user_init+0xfffb8e48>
4028: 000001 l32r a0, fffc4028 <user_init+0xfffb8e48>
402b: 0000c0 callx0 a0
402e: 0f1d mov.n a1, a15
4030: b108 l32i.n a0, a1, 44
4032: a1f8 l32i.n a15, a1, 40
4034: 30c112 addi a1, a1, 48
4037: f00d ret.n
4039: 000000 ill
...
...
...
0000b1e0 <user_init>:
b1e0: f0c112 addi a1, a1, -16
b1e3: 3109 s32i.n a0, a1, 12
b1e5: 21f9 s32i.n a15, a1, 8
b1e7: 01fd mov.n a15, a1
b1e9: 020c movi.n a2, 0
b1eb: 000005 call0 b1ec <user_init+0xc>
b1ee: 020c movi.n a2, 0
b1f0: b6a232 movi a3, 0x2b6
b1f3: 000001 l32r a0, fffcb1f4 <user_init+0xfffc0014>
b1f6: 0000c0 callx0 a0
b1f9: 000005 call0 b1fc <user_init+0x1c>
b1fc: 000005 call0 b200 <user_init+0x20>
b1ff: 000021 l32r a2, fffcb200 <user_init+0xfffc0020>
b202: 000001 l32r a0, fffcb204 <user_init+0xfffc0024>
b205: 0000c0 callx0 a0
b208: 0f1d mov.n a1, a15
b20a: 3108 l32i.n a0, a1, 12
b20c: 21f8 l32i.n a15, a1, 8
b20e: 10c112 addi a1, a1, 16
b211: f00d ret.n
memset:
4000e190:743030 extuia3, a3, 0, 8
4000e193:117380 sllia7, a3, 8
4000e196:203370 ora3, a3, a7
4000e199:117300 sllia7, a3, 16
4000e19c:203370 ora3, a3, a7
4000e19f:205220 ora5, a2, a2
4000e1a2:cee207 bbsia2, 0, 4000e174 <memmove+0x128>
4000e1a5:d8e217 bbsia2, 1, 4000e181 <memmove+0x135>
4000e1a8:417440 srlia7, a4, 4
4000e1ab:179c beqz.na7, 4000e1c0 <memset+0x30>
4000e1ad:1167c0 sllia6, a7, 4
4000e1b0:665a add.na6, a6, a5
4000e1b2:0539 s32i.na3, a5, 0
4000e1b4:1539 s32i.na3, a5, 4
4000e1b6:2539 s32i.na3, a5, 8
4000e1b8:3539 s32i.na3, a5, 12
4000e1ba:10c552 addia5, a5, 16
4000e1bd:f12567 blta5, a6, 4000e1b2 <memset+0x22>
4000e1c0:056437 bbcia4, 3, 4000e1c9 <memset+0x39>
4000e1c3:0539 s32i.na3, a5, 0
4000e1c5:1539 s32i.na3, a5, 4
4000e1c7:558b addi.na5, a5, 8
4000e1c9:036427 bbcia4, 2, 4000e1d0 <memset+0x40>
4000e1cc:0539 s32i.na3, a5, 0
4000e1ce:554b addi.na5, a5, 4
4000e1d0:046417 bbcia4, 1, 4000e1d8 <memset+0x48>
4000e1d3:005532 s16ia3, a5, 0
4000e1d6:552b addi.na5, a5, 2
4000e1d8:026407 bbcia4, 0, 4000e1de <memset+0x4e>
4000e1db:004532 s8ia3, a5, 0
4000e1de:f00d ret.n
Code:
Table 4–27. Code Density Option Instruction Additions
Instruction1 Format Definition
ADD.N RRRN Add two registers (same as ADD instruction but with a 16-bit encoding).
ADDI.N RRRN Add register and immediate (-1 and 1..15).
BEQZ.N RI16 Branch if register is zero with a 6-bit unsigned offset (forward only).
BNEZ.N RI16 Branch if register is non-zero with a 6-bit unsigned offset (forward only).
BREAK.N2 RRRN This instruction is the same as BREAK but with a 16-bit encoding.
L32I.N RRRN Load 32 bits, 4-bit offset
MOV.N RRRN Narrow move
MOVI.N RI7 Load register with immediate (-32..95).
NOP.N RRRN This instruction performs no operation. It is typically used for instruction alignment.
RET.N RRRN The same as RET but with a 16-bit encoding.
RETW.N3 RRRN The same as RETW but with a 16-bit encoding.
S32I.N RRRN Store 32 bits, 4-bit offset
Code:
if (FormatedHTMLPage == 0x0)
{
os_printf("[%s][%s][%d] - Unable to Alloc memory, exiting\r\n", __FILE__ ,__func__, __LINE__);
return;
}
Code:
IP Address: 192.168.1.51
Netmask : 255.255.255.0
Gateway : 192.168.1.1
Calling myConnectToStronestWifiCallback callback
[Main.c][EnterMaintainanceMode][537]
AP Already Loaded[../library/webserver.h][init_webserver][786]
Setting Callback for WebServer
[../library/dnsserver.h][init_dnsserver][170]
-=-=-=-=-=-=-=-=- START DumpSPItable -=-=-=-=-=-=-=-=-
Read from: 0x67004-0x67007, Pending ff: EOF!
-=-=-=-=-=-=-=-=- END DumpSPItable -=-=-=-=-=-=-=-=-
[init_igmp]
IGMP Joining: 3301a8c0 faffffef, joined
Fatal exception 9(LoadStoreAlignmentCause):
epc1=0x40101074, epc2=0x00000000, epc3=0x00000000, excvaddr=0x00000003, depc=0x0�000000
ets Jan 8 2013,rst cause:2, boot mode:(3,6)
load 0x3ffe8000, len 2192, room 16
tail 0
chksum 0xcd
load 0x3ffe8890, len 22224, room 8
tail 8
chksum 0x44
load 0x40100000, len 30784, room 0
tail 0
chksum 0xc8
csum 0xc8
����n�r��n|�llll`b��|r�l�n��n�l`��r�l�l�l`��r�l�l�l`��r�l����5����c][user_init][765]
[../library/../library/common.h][Common_UserInit][1412]
sleep disable
Starting ESP8266 Standard!
SDK version:2.1.0(116b762)
Loaded from: 0x00
Vdd33_Const: ff
data : 0x3ffe8000 ~ 0x3ffe8890, len: 2192
rodata: 0x3ffe8890 ~ 0x3ffedf60, len: 22224
bss : 0x3ffedf60 ~ 0x3fff4a98, len: 27448
heap : 0x3fff4a98 ~ 0x3fffc000, len: 30056
reset reason: 2
REASON_EXCEPTION_RST (9)
[GetEXCCount]
[StoreEXCCount] creating with: 1
epc1=0x40101074, epc2=0x00000000, epc3=0x00000000, excvaddr=0x00000003, depc=0x00000000
System halt!
Statistics: Posted by AgentSmithers — Mon Oct 07, 2019 7:35 am