ESP8266 Developer ZoneThe Official ESP8266 Forum2015-07-20T16:59:02+08:00https://bbs.espressif.com:443/feed.php?f=7&t=7352015-07-20T16:59:02+08:002015-07-20T16:59:02+08:00https://bbs.espressif.com:443/viewtopic.php?t=735&p=2750#p2750 Thanks for your interest in ESP8266 !
]]>2015-07-13T21:17:27+08:002015-07-13T21:17:27+08:00https://bbs.espressif.com:443/viewtopic.php?t=735&p=2643#p2643 However, if timestamping is performed in the application layer, interrupts and other unpredictable software processes can introduce jitter and latency which may impair the synchronization. Even the use of a very precise external oscillator won't overcome the stack jitter associated with a software-only 1588 implementation.
Most applications require the higher accuracy achieved by timestamping packets at the interface between the physical (PHY) and data link (MAC) layers (often referred to as "hardware timestamping"). IEEE 1588 hardware timestamping typically improves accuracy to 100 nanoseconds or better for certain network configurations, which is better than NTP, SNTP, Time-Triggered Protocol (TTP - http://www.ttpforum.org) and SERCOS (IEC 61491) methods.