ESP8266 Developer Zone The Official ESP8266 Forum 2017-05-18T14:33:16+08:00 https://bbs.espressif.com:443/feed.php?f=9&t=4592 2017-05-18T14:33:16+08:00 2017-05-18T14:33:16+08:00 https://bbs.espressif.com:443/viewtopic.php?t=4592&p=13230#p13230 <![CDATA[Re: XPD_DCDC state while in deep sleep]]>
You can refer to the ESP8266 Pin List: http://www.espressif.com/en/support/download/documents.
It is at high logic level.

Thanks for your interest in ESP8266 !

Statistics: Posted by ESP_Faye — Thu May 18, 2017 2:33 pm

]]> 2017-05-17T12:33:06+08:00 2017-05-17T12:33:06+08:00 https://bbs.espressif.com:443/viewtopic.php?t=4592&p=13189#p13189 <![CDATA[XPD_DCDC state while in deep sleep]]>
I'd like to know what is the XPD_DCDC state while the ESP8285 is in deep sleep.

Is it at high logic level?

Or is it at high impedance?

In other words: Is it an open drain GPIO during deep sleep?

Thank you.

Best regards,
Hatus

Statistics: Posted by hatus — Wed May 17, 2017 12:33 pm

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