Bad FLASH allocation ?

[David.M]

Hi everybody,

I have the kit of development olimex and I have a question as regards the pinout between the ESP8266 and the flash memory.
They use QUAD SPI protocol.

Here we have schematic :

http://www.google.fr/imgres?imgurl=http%3A%2F%2F41j.com%2Fblog%2Fwp-content%2Fuploads%2F2015%2F01%2Folimex_esp8266.png&imgrefurl=http%3A%2F%2F41j.com%2Fblog%2F2015%2F01%2Folimex-esp8266-pcb-schematicslayout%2F&h=596&w=891&tbnid=Gd-xlClXjs8O0M%3A&docid=CtNF_N8QF_yGwM&ei=n3cSVtjpKIqzUd-FjtgD&tbm=isch&iact=rc&uact=3&dur=1270&page=1&start=0&ndsp=23&ved=0CCcQrQMwAmoVChMImLXAzrSryAIVilkUCh3fggM7

If we get back the datasheet of the flash memory W25Q16, we notice, for SQI protocol the pinout is the following one:

Pin 5: IO0 data input / output 0
pin 2: IO1 data input / output 1
pin 3: IO2 data input / output 2
pin 7: IO3 data input / output 3

We observe not at all this allowance on evaluation kit and I do not understand how we can FLASH with this allowance (D0 (uC) == > D1 (flash); D1 (uC) == > D0 (Flash); D2 (uC) == > D3 (flash); D3 (Uc) == > D2 (flash) ....) It's rubbish not?

Thank you in advance for clarification on this point

[Espressif_Kelly]

Dear David,

Please be noted that external spi flash is connected to ESP8266EX through SPI interface, not SDIO interface.
Thus, there is no correspondence as the name of the pin indicated.
The right relation between flash and ESP8266EX is as shown below.

1.png (8.79 KiB) Viewed 5579 times

Any more questions, please let us know.

Thanks.