GPIO state during power-down (deep-sleep aka reset state)

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GPIO state during power-down (deep-sleep aka reset state)

Postby rhaenel » Wed Aug 31, 2016 9:41 pm

Dear all,

The datasheet of the ESP8266 contains the following about the GPIO's:

Data I/O soldering pad is bidirectional and tri-state that include data input and output controlling
buffer. Besides, I/O can be set as a specific state and remains like this. For example, if you intend to
lower the power consumption of the chip, all data input and output enable signals can be set as
remaining low power state. You can transport some specific state into the I/O. When the I/O is not
powered by external circuits, the I/O will remain to be the state that it was used the last time. Some
positive feedback is generated by the state-remaining function of the pins, therefore, if the external
driving power must be stronger than the positive feedback. Even so, the driving power that is
needed is within 5uA.

Unfortunately, for me it's not really clear what this means.

Does it mean that the GPIO state can be preserved during power-down state (reset state)? Is it necessary to configure anything to achieve this behavior?

What is the thing about the 5uA positive feedback, does that mean that the state get overridden if an external part supplies more than 5uA into the GPIO?


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Re: GPIO state during power-down (deep-sleep aka reset state)

Postby pratik » Fri Sep 02, 2016 9:58 am

Here is the information regarding GPIO state retention:

Power reboot - changed
Hardware WDT reset - changed
Fatal exception - unchanged
Software watchdog reset - unchanged
Software reset - unchanged
Deep-sleep - changed
Hardware reset - changed

i.e., all hardware reset events affect the GPIO state (as boot.BIN initializes the GPIO states).
As for the GPIO, the description is regarding internal operation of the GPIO. For minimal power consumption, please do not bias the pin if it is not in use.
Pratik Panda

Custom firmware, Knowledge base and freelancing (ESP8266/ESP32):

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