overlape enabled,amplitude of spi clock is only around 2V

[mikewang]

hi all u guys,
here comes the problem with the overlap function of hspi.
1.when overlap disabled, hspi could work successfully to communicate with alternative flash ic;
2.when overlap function enabled to reflect hspi port to program spi port to save pins, time consequence come out as expected, however the amplitude of hspi clock signal is only round 2 voltage showed in followed picture. A pull-up resistor has been tried, but it does not work bothering me so much. i will really appreciate it so much if u guys have any ideas about this situation!

[Helios]

Due to the bandwidth of oscillograph, it seems to be a 2V high-level.
Actually, the high-level part waveform may be the cycles of the 80MHz clock.
Please select SPI-Flash as 40MHz during downloading.


In overlap mode, SPI-Flash and HSPI must be one of the following cases:
1) both are 80MHz
2) none is 80MHz. For example, SPI-Flash is 40MHz, the other device is 10MHz

[mikewang]

Due to the bandwidth of oscillograph, it seems to be a 2V high-level.
Actually, the high-level part waveform may be the cycles of the 80MHz clock.
Please select SPI-Flash as 40MHz during downloading.


In overlap mode, SPI-Flash and HSPI must be one of the following cases:
1) both are 80MHz
2) none is 80MHz. For example, SPI-Flash is 40MHz, the other device is 10MHz

first,thanks for your prompt reply,but there still some information needing to be shared with u ,
it gonna implemented by the way of answering ur question
Due to the bandwidth of oscillograph, it seems to be a 2V high-level.
not exactly, oscillograph has the ability to show 3.3V high-level clock waveform completely with some kind of distortion when overlap disabled ,but anyway is still works
the high-level part waveform may be the cycles of the 80MHz clock
actually i do not has any ideas about this , i gonna spend more time in observing this phenomenon.
In overlap mode, SPI-Flash and HSPI must be one of the following cases:
1) both are 80MHz
2) none is 80MHz. For example, SPI-Flash is 40MHz, the other device is 10MHz[/quote]
when image downloaded , 40Mhz mode was selected which means spi-flash clock was 40Mhz and device clock was 10Mhz in my case accidently in accordance to ur requirement 2

hope for further explanation！
thank you so much!

[Helios]

Thanks for your trying and patience.

I guess it is a PCB problem.
I suggest that we can insert a serial resistance (200ohm) between ESP8266 SPI-CLK pin and the two spi-slaves (Flash and the device).
Then you can check the waveforms of the two end of the resistance.

The digital pad of ESP8266 can drive 20mA current. So it shall be a voltage on the resistance.

[mikewang]

Thanks for your trying and patience.

I guess it is a PCB problem.
I suggest that we can insert a serial resistance (200ohm) between ESP8266 SPI-CLK pin and the two spi-slaves (Flash and the device).
Then you can check the waveforms of the two end of the resistance.

The digital pad of ESP8266 can drive 20mA current. So it shall be a voltage on the resistance.

thank you so much
fine,from ur suggestion, it is doubted that this situation may be caused by a heavy load, so the resistor is used to test the current flowing through 200ohm resistor,right?
however i got one more thing u need to know that the waveform in the picture was captured when leaving the clock pin float,so the device has exactly no affect on the clock pin. anyway i gonna try ur suggestion out.

[mikewang]

Thanks for your trying and patience.

I guess it is a PCB problem.
I suggest that we can insert a serial resistance (200ohm) between ESP8266 SPI-CLK pin and the two spi-slaves (Flash and the device).
Then you can check the waveforms of the two end of the resistance.

The digital pad of ESP8266 can drive 20mA current. So it shall be a voltage on the resistance.

hi buddy：
ur suggestion has been tried out these days , but no signature potential difference existed between resistor(200ohm) which can implied that there is no heavy load attached to this pin. ahm, this almost drive me crazy these days without figuring this out

[ESP_Faye]

Hi,

So sorry for the inconvenience.

We released a documentation about SPI overlap http://bbs.espressif.com/viewtopic.php?f=5&t=591

Could it help?

[Helios]

Dear MikeWang,
Please do a more try: setting the Flash-clock as 20MHz during downloading.
If software exceptions occur, it means a register bit of SPI is wrong.
Please also check the clock waveform of Flash. It shall be 20MHz regarding to your settting.

[nissimzur]

It seems as GND is not so good. Try to add GND parallel to PCB to avoid ground loop. and share that with GND Scop too.
2V as "high" is OK in system that has 3.3V a VCC. Since all the chip CMOS and any voltage above 1.65V is high.
Other potential error is your power supply that may not deliver read good 3.3V @ 0.5A , use other laboratory power supply and add on the chip fast capacitors (fast discharge). The ringing on top of the 2V has to go!
Skype:nissim.test