Hardware bug: UART1 TX level not mirrored in status register

RFZ
Posts: 6
Joined: Mon Aug 21, 2017 12:37 am

Hardware bug: UART1 TX level not mirrored in status register

Postby RFZ » Sun Apr 19, 2020 1:58 am

Hi,
I guess I may have found a bug in the ESP8266 hardware / UART1 interface. Bit 31 of register 0x60000F1C (UART1 status register) should mirror the TX level of UART1. However, I found it to be always 0.

A workaround is actually to enable loopback mode for UART1 and read bit 15 of register 0x60000F1C, which mirrors the RX level. Since UART1 is TX only (?) that's not a huge problem.

The code I used to test this can be found here:
https://www.esp8266.com/viewtopic.php?f=13&t=21169&start=12

I'd appreciate if someone can confirm this.

RFZ
Posts: 6
Joined: Mon Aug 21, 2017 12:37 am

Re: Hardware bug: UART1 TX level not mirrored in status register

Postby RFZ » Fri May 01, 2020 6:27 pm

Same for UART0

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