Boot process / flash / rom

2018-06-13T07:22:10+08:00

Hey there,

can anyone describe the boot process - specifically the internal boot loader functionality. Does it just read 64K from SPI flash or is it more intelligent? I cant find the info in the L1 system spec.

Shareef.

Statistics: Posted by andreysnug — Wed Jun 13, 2018 7:22 am

Re: Boot process / flash / rom

2017-05-14T20:43:10+08:00

The address space that ESP8266 supports using hardware acceleration for standard SPI flash is 128MBit. I don't think that the option to use 128Mbit as primary flash has been implemented yet for ESP8266 officially.
Is your program THAT large?
If you just want to store data for most of the part, you may try setting flash size as 32MBit in flash tool and use the 4MB flash map.
But during execution, you should be able to access the remaining 12MB in code.
So if you just need the size for storing data, this should be fine.

If you need to store executable code in space over 4MB, let me know, I will ask relevant people internally and get back to you.

Statistics: Posted by Guest — Sun May 14, 2017 8:43 pm

Boot process / flash / rom

2017-05-06T07:30:25+08:00

Hi,

I am missing information about the boot process, especially the interaction with the flash.
Specifically, I am trying to boot the esp8266 from a 128MBit flash.

What I understand is, that there is code in the ROM within the esp8266, which, upon power-up, reads the first block of the flash via SPI.
In that block we have 2 bytes (at position 2 and 3).
Their meaning is (found elsewhere in this forum):

==============================
# SPI FLASH PARAMS
#-------------------
#flash_mode=
# 0: QIO
# 1: QOUT
# 2: DIO
# 3: DOUT
#-------------------
#flash_clk_div=
# 0 : 80m / 2
# 1 : 80m / 3
# 2 : 80m / 4
# 0xf: 80m / 1
#-------------------
#flash_size=
# 0 : 512 KB
# 1 : 256 KB
# 2 : 1024 KB
# 3 : 2048 KB
# 4 : 4096 KB
#-------------------
# END OF SPI FLASH PARAMS
#============================
byte2=int(flash_mode)&0xff
byte3=(((int(flash_size)<<4)| int(flash_clk_div))&0xff)

Now what is left unclear in the documentation is

1) in which flash_mode and clock frequency does the ROM load the initial sector 0 ?

2) what happens after the rom has loaded this sector? (I would have expected it to start executing whatever code is contained in that sector, but instead it seems to search within the flash for other code at semi-random addresses and does not execute the code).

3) assuming the ROM searches the flash for other valid code, how are these addresses determined?

4) I believe the flash size is significant, for the ROM to determine which address the code is expected. If so, is the size of the flash determined by flash_size (byte 3) in sector 0, or does the ROM use "Common Flash Interface" to determine the flash size?

5) what is the criteria for the ROM to decide wether or not it found valid code at a given address?

6) Whilst the chip is capable of QUOT the required connections are not made. Will the ROM honour the flash_mode setting in byte 2 when searching for code in the flash?)

7) Which functions are available within the ROM and could you please document that API. (not the SDK - that is well enough documented - I am looking for the functions within the ROM)

8) Given that above table only goes upto 4 Megabyte / 32mbit: what value should I set flash_size on a 128mbit flash?

Thanks,

Conrad

the flash chip is this one:
https://www.digikey.com/product-detail/ ... ND/3874288

Statistics: Posted by SingingCat — Sat May 06, 2017 7:30 am

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Boot process / flash / rom

Re: Boot process / flash / rom

Boot process / flash / rom