Code:
/*-----------------------------------------------------------------------------------------------------------------------------\
| Command name | Status bit set in registry | First request | Second request |
|------------------------------------------------------------------------------------------------------------------------------|
| write status | SPI_SLAVE0_WR_STA_DONE | 0x01 + status (2bytes, 8 bits/word) | None |
|------------------------------------------------------------------------------------------------------------------------------|
| write data | SPI_SLAVE0_WR_BUF_DONE | 0x02 + 0x00 (2bytes, 8 bits/word) | 32 bytes of data (32bytes, 32 bits/word) |
|------------------------------------------------------------------------------------------------------------------------------|
| read data | SPI_SLAVE0_RD_BUF_DONE | 0x03 + 0x00 (2bytes, 8 bits/word) | 32 bytes of data (32bytes, 8 bits/word) |
|------------------------------------------------------------------------------------------------------------------------------|
| read status | SPI_SLAVE0_RD_STA_DONE | 0x04 + 0x00 (2bytes, 8 bits/word) | None |
\------------------------------------------------------------------------------------------------------------------------------*/
Statistics: Posted by hetii — Tue Aug 22, 2017 8:27 pm
Statistics: Posted by Guest — Thu Oct 13, 2016 11:31 am
// Configure MUX to allow HSPI
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105);
// SCK, MOSI, MISO and CS
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);
Statistics: Posted by xPhyiscs — Mon Sep 19, 2016 2:22 pm
Statistics: Posted by Guest — Mon Sep 19, 2016 11:02 am
Statistics: Posted by xPhyiscs — Mon Sep 19, 2016 12:19 am
Statistics: Posted by Guest — Sat Sep 17, 2016 8:33 pm
Statistics: Posted by xPhyiscs — Fri Sep 16, 2016 4:55 pm
Statistics: Posted by kajtusize — Mon Mar 07, 2016 4:08 pm
Statistics: Posted by costaud — Thu Dec 18, 2014 4:35 pm