I2S Interrupt Mask (INUM)

[anwarhahj]

Hi. Thanks for your great work here!

If one needs to set an I2S interrupt, such as I2S_I2S_RX_TAKE_DATA_INT, what interrupt number should be supplied to ets_isr_attach()?

Thanks.

[eriksl]

Do you have any evidence that there is actually hardware support for I2S? Because I don't think so (likewise I2C). I think you're up to your own, bit banging in software.

[anwarhahj]

Based on my examination of the SPI and I2S datasheets released by Espressif:
(8N, 8P, 8H) viewtopic.php?f=20&t=225
It seems that there is an I2S module with a TX and RX unit, but I am unsure if this is the same SDIO unit that document 8H indicates can run in SPI compatibility mode. I don't know if the I2S function is just a compatibility mode as well. They share the same link list configuration instructions for DMA transfer.

I ask about the registers and interrupts because I see interrupt registers defined in the Espressif mp3 streaming I2S example, but I can't seem to make them function automatically. I don't know if this is something I can write a value to the raw interrupt register and trigger an interrupt that way.

I tried some bit banging, and I am able to detect word changes on my I2S Word_select input line, but I have not yet been successful getting the I2S FIFO to read in the DATA line in response. I am also unsure if the FIFO can make an automatic operation to the DMA. There is a register called I2SREXOF_NUM that seems to have something to do with this.

Long story short, I will take your advice and keep trying to implement software control after I calm down for a bit. Thanks.

[sourse]

I also confuse the interrupt mask of all of interrupt sources casue there is no any documents to descripe them. But now I2S you can refer the sample code via: viewtopic.php?f=31&t=1343.
Good luck!

BR.
ss