However, I am confused regardingf the pinout: if I take the pin definitions from both the latest 0A-ESP8266__Datasheet__EN_v4.4.pdf datasheet and the 0B-ESP8266__Hardware_User_Guide__EN_v1.1.pdf hardware guides, I read the following pinout in Section 2.1. Pin Definitions:
- Pin 18: SDIO_DATA_2 I/O Connect to SD_D2 (Series R: 200Ω); SPIHD; HSPIHD; GPIO9
- Pin 19: SDIO_DATA_3 I/O Connect to SD_D3 (Series R: 200Ω); SPIWP; HSPIWP; GPIO10
- Pin 20: SDIO_CMD I/O Connect to SD_CMD (Series R: 200Ω); SPI_CS0; GPIO11
- Pin 21: SDIO_CLK I/O Connect to SD_CLK (Series R: 200Ω); SPI_CLK; GPIO6
- Pin 22: SDIO_DATA_0 I/O Connect to SD_D0 (Series R: 200Ω); SPI_MSIO; GPIO7
- Pin 23: SDIO_DATA_1 I/O Connect to SD_D1 (Series R: 200Ω); SPI_MOSI; GPIO8
However, when looking at the SPI slave schematic on the last page of same 0B-ESP8266__Hardware_User_Guide__EN_v1.1.pdf, I see:
- Pin 18: SD_D2, NC
- Pin 19: SD_D3/SPI_CS
- Pin 20: I/O Connect to SD_CMD (Series R: 100Ω); SD_CMD/SPI_MOSI
- Pin 21: I/O Connect to SD_CLK (Series R: 100Ω); SD_CLK/SPI_CLK
- Pin 22: I/O Connect to SD_D0 (Series R: 100Ω); SD_D0/SPI_MISO
- Pin 23: I/O Connect to SD_D1 (Series R: 100Ω); SD_D1/SPI_INT
Which source should I trust?
Also, please confirm that it is setting GPIO0 low during bootstrap that selects the SPI slave mode, while GPIO15 (MTDO) low selects UART0 download mode, and GPIO15 (MTDO) high or floating boots normally from SPI flash on MTMS/MTDI/TCK/MTDO SPI master pins.
EDIT: from the datasheet, it looks like the first pinout is the one defined in Section 3.3.1. General SPI (Master/Slave), whereas the second one is the one defined in Section 3.3.2. SDIO / SPI (Slave), so my question is: what is the difference between these 2 modes, and which one should I use?